Infineon has further optimized the already beneficial properties of SiC—with CoolSiC Trench Technology, MOSFETs with especially high threshold voltages (Vth) and low Miller capacitance are possible. This makes them more resilient to undesirable parasitic turn-on effects compared to other SiC MOSFETs. In addition to the 1,200V and 1,700V models, Infineon has since expanded its portfolio to include 650V CoolSiC MOSFETs, which can also be used in 230V mains applications. Their higher system efficiency and robustness and their lower system costs enable them to be used in applications such as telecommunications, servers, charging stations for electric vehicles, and battery packs.
If the choice is generally between the tried-and-true Si-based MOSFETs and the more recent SiC-based MOSFETs, there are various criteria to consider.
Efficiency and Power Density of Application
Compared with silicon, the RDSon of silicon carbide is less prone to volatility in the operating temperature range. With a SiC-based MOSFET, RDSon only moves by a factor of around 1.13 between 25°C and 100°C, while with a typical Si-based MOSFET such as the CoolMOSTM C7 from Infineon, it changes by a factor of 1.67. This means that the operating temperature has much less of an impact on power loss and can therefore be much higher. As a result, SiC-based MOSFETs are ideal for high-temperature applications or can make do with simpler cooling solutions to achieve the same efficiency levels.
When switching from silicon to silicon carbide, there is also the question of suitable drivers. If Si-based MOSFET drivers generate a gate turn-on voltage of up to 15V, they can generally continue to be used. However, a gate turn-on voltage of up to 18V allows for a significant further reduction in the resistance RDSon (by up to 18% at 60°C), such that a change in driver might still be worthwhile.
It is also recommended to avoid negative voltages at the gate as these can cause a shift in VGS(th), such that RDSon increases with prolonged operation. The voltage drop across the source inductance in the gate drive loop results in a high di/dt, which may cause a negative VGS(off) level. An even bigger challenge is posed by a very high dv/dts, which is caused by the gate drain capacitance of the second switch in a half-bridge configuration. This problem can be avoided with a lower dv/dt, but at the expense of reduced efficiency.
The best way to limit negative gate voltage is to use a separate power and driver circuit by means of the Kelvin source concept and to integrate a diode clamp. Positioned between the gate and source of the switch, a diode clamp limits the negative voltage present at the gate.
Reverse Recovery Charge Qrr
Especially with resonant topologies or designs that use continuous hard commutation of the conducting body diode, it is important to also consider the reverse recovery charge Qrr. This is the charge that has to be removed from the integrated body diode-present in all diodes-when the diode is no longer conductive. Various component manufacturers have made great efforts to reduce this charge as much as possible. The "Fast Diode CoolMOS" family from Infineon is one example of the fruits of these efforts. These feature faster body diodes and can reduce Qrr by a factor of 10 compared to their predecessors. Infineon's CoolSiC family even gets one up on this-compared to the latest CoolMOS components, these SiC MOSFETs achieve a further 10× improvement.
CoolSiC technology allows for the development of systems with fewer components and reduced magnetic elements and heat sinks, making them simpler, smaller, and cheaper. Thanks to Trench Technology, these components also guarantee the lowest losses in usage and the highest reliability in operation.
Power Factor Correction (PFC)
The focus of the industry is currently on increasing system efficiency. To achieve efficiency values of at least 98%, more efforts are being directed towards power factor correction (PFC). SiC-based MOSFETs with improved Qrr help to achieve this. These now enable hard-switched half-bridge/full-bridge topologies for PFC. For its CoolMOS technology, Infineon had previously recommended a "Triangular Current Mode" approach, but with SiC it is possible to implement a continuous conduction mode totem pole PFC.
Output Capacitance COSS
In a hard-switched topology, the stored energy COSS must be dissipated; this energy is typically greater than with the latest CoolMOS version. Compared to the turn-on losses of a totem pole PFC, however, it is still relatively low and thus negligible, at least initially. The lower capacitance means that it is possible to benefit from faster switching speeds, but this can also lead to drain source overshoot (VDS) during turn-on.
With Si-based MOSFETs, this can be compensated for using an external gate resistor to reduce the switching speeds and achieve the required voltage derating of 80% at the drain source. The disadvantage of this solution is that, especially during turn-off, the increase in current results in greater switching losses.
While the output capacitance with SiC-based MOSFETs is greater than with comparable Si-based power semiconductors across a 50V drain source voltage, the COSS/VDS relationship is much more linear. The result of this is that SiC-based MOSFETs allow a lower external resistor to be used in the same circuit compared to Si-based models without exceeding the maximum drain source voltage. This can be advantageous in some circuit topologies, for example in LLC resonant DC/DC converters, in which it is possible to omit the additional gate resistor.
Although silicon carbide technology has many advantages, the obsolescence of Si-based MOSFETs is by no means a given. This is in part due to the much higher threshold voltage of the body diode—simply replacing a Si-based MOSFET with a SiC-based model would result in four times the power loss in the body diode, essentially sacrificing the efficiency gains. To actually benefit from the greater efficiency of SiC-based MOSFETs, the boost function of a PFC must be used across the MOSFET channel and not in the reverse direction across the body diode. Dead times must also be optimized to fully leverage the benefits of SiC-based MOSFETs.
SiC-based MOSFETs have fewer conductivity losses and up to 80% fewer switching losses compared to IGBTs-in this case using the example of the 650V CoolSiC MOSFET from Infineon.
Trench Technology minimizes losses in use and provides maximum reliability in operation.
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