New Memory Technology for Innovative IoT Applications - The Golden Mean

09/01/2022 Know-How

Whether vehicle infotainment, wearables, smart home, or smart factory applications: They all need to be scalable to ensure innovative user experiences and functionalities. This requires MCUs offering higher performance and lower power consumption. These parameters are often set limits for the memory, but they can now be overcome thanks to a new technology.

Most MCUs or FPGAs are equipped with an internal memory optimized for a few applications, meaning they cannot satisfy every requirement. This is especially true for applications that require high memory capacity and high bandwidth to perform operations. These include image/audio buffering or machine learning (ML), which demand an extensive neural network.

Conventional external memories

Typically, an external memory is the most viable and easily scalable method for these applications. Depending on the density and performance requirements of the target application, the conventional SRAM (static random access memory) and SDR/DDR DRAM (dynamic random access memory) options are available to users. Due to their different technologies and architectures, they have varying density and performance specifications. However, both are generally unsuitable for innovative IoT applications, since next-generation IoT applications require a wider range of functions with a compact design and high energy efficiency. For example, the usual layout topology of a six-transistor SRAM has not shrunk at the same rate as the process nodes. This means that the memory does not support higher density and is relatively expensive. It is thus increasingly uneconomical to use SRAM to meet the demands of the latest IoT applications that require high memory capacity.

Although DRAM offers cost advantages over SRAM, as it consists of only one single transistor and capacitor, it also has some disadvantages. The biggest ones are the high pin count, high power consumption and complex integration. For applications without constraints in this respect, legacy SDR DRAM remains a possible option for existing systems. They are, however, hardly suitable for many cutting-edge, compact IoT systems.

Fig. 1 presents the available external memory options with the parameters designers need to consider when selecting them. It clearly shows that embedded SRAM is the best memory technology for SoC applications. That said, there is also a limiting factor here: Due to the chip size and cost of integration into the logic process, the density of embedded SRAM is limited. Moreover, as MCUs continue to evolve and migrate into modern IoT application processes, embedded SRAM is losing its advantage in standby performance.

DRAM, on the other hand, while suitable for high-end applications, is often overkill for many other IoT applications. The reason for this is that the pin count, speed, and power are far too high.

An alternative memory technology is PSRAM (pseudo SRAM). Here, the power and the number of ports are ideally balanced, and it has low power requirements.

IoT RAM fills the gap between DRAM and SRAM

IoT RAM is based on PSRAM technology, assuming its features and combining them with a relatively simple SRAM interface for easy product design. With additional interface options, such as NOR flash SPI interfaces with low pin count used by most MCUs, IoT RAM is an option wherever SoCs need more memory than the internal SRAM can provide.

Looking at the costs, the product costs of IoT RAM are up to ten times lower than those of SRAM. At the same time, IoT RAM has five to ten times higher memory density as it uses DRAM memory cell technology with only one transistor and one capacitor.

Low pin count

Compared to SRAM, IoT RAM offers a higher data bandwidth and is comparable to conventional SDRAM, but with a much lower pin count (Fig. 2). With IoT RAM, the IO configuration can support a 1-bit, 4-bit, 8-bit, and 16-bit data bus.

IoT RAM therefore significantly reduces the number of pins required for the bandwidth of modern IoT applications (Fig. 3). Moreover, the system design is simplified and the SoC pins can be used for other purposes.

IoT RAM also has a significant advantage over DRAM in terms of the pin count: x16 IoT RAM requires three times fewer pins than x32 SDRAM with comparable data throughput. This leads to a reduction in the size of the chip and thus a reduction in silicon area, costs, and PCB size. Compared to an SDRAM x32 BGA90, the package of an IoT RAM BGA24 is up to three times smaller and thus extremely space saving. In addition, MCU pins are freed up for other purposes and the memory is also optimized for burst memory access.

Low power consumption

In terms of energy consumption, IoT RAM requires around four times less pJ/bit (picojoules per bit) than conventional DRAM (Fig. 4). The short latency of IoT RAM enables fast power-up times and very fast wake-up from low-power modes and stand-by mode. Furthermore, IoT RAM offers full data retention with ultra-low standby power consumption – typically 0.1 to 0.3 µA/Mbit depending on density – as well as a deep power-down mode with less than 8 µA for all octal peripheral interface (OPI) densities.

IoT RAM for frame buffering with MCU

The IoT RAM memories from AP Memory are based on PSRAM technology and already work with many MCUs, SoCs, and FPGAs that are widely used in IoT and embedded devices.

For a smart wristband, the required data throughput is calculated to be roughly 5 MB/s (71,392 × 3 bytes × 30 fps). Considering the additional latency for the SoC bus and the choice of memory bus frequency of less than 100 MHz for many SoCs in this category, IoT RAM QSPI SDR is sufficient to achieve the required data rate.

With a simple smartwatch, on the other hand, the required data throughput of roughly 25 MB/s (135,424 × 3 bytes × 60 fps) is well above that and can even be higher depending on the actual model. In this case, IoT RAM OPI or HPI achieves the necessary data rate better. For high-volume, competitive wearables, the WLCSP package options are recommended.

IoT RAM with a wide range of bandwidths is also available for the smart home and industrial market. For example, an entry-level 16 MB QSPI SDR-SOP8 IoT RAM is suitable for a simple thermostat display that requires about 10 MB/s. The high requirements of an HD 720p display, on the other hand, can be met with a 256 MB OPI or HPI IoT RAM in a BGA24 package.

IoT RAM: Turning point for many MCU-based applications

These features have made IoT RAM the memory of choice for wearables in recent years. Many of the latest MCUs, wireless SoCs, and FPGAs from market-leading manufacturers view this memory as the ideal choice for all IoT, edge AI, and industrial applications.

Using reference designs from SoC partners and Rutronik, manufacturers can ensure the effective use of their developer resources and a short time to market for their projects. Rutronik’s RDK2, for example, is based on Infineon’s PSoC 62 and, in combination with external PSRAM (64 Mbit QSPI), offers a modern and easy-to-use hardware platform for developing numerous applications, most notably wearables and sensors.


Low pin count, low power consumption, a wide choice of packages, as well as competitiveness and simplicity in design, and integration of IoT RAMs make the real difference compared to conventional and legacy SDRAM approaches.


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New Memory Technology for Innovative IoT Applications

Figure 1: Comparison of external memory technologies.

Figure 2: IoT RAM offers a higher data bandwidth than SRAM with a much lower pin count

Figure 3: Comparison of the pin count of IoT RAM and SDRAM

Figure 4: Bandwidth and power consumption of different types of memory

Table 2: Examples of image storage requirements for varying applications

Figure 5: Using external IoT RAM, RDK2 is a modern and easy-to-use hardware platform, especially for the development of wearables and sensors.