The inverter converts the direct current produced by the solar cells into the alternating current used by public electricity grids. An inverter that works more efficiently (i.e. by minimizing heat loss) means a complete solar power system that not only runs more efficiently but also more cost-effectively. This is firstly because less investment is required in the cooling, while secondly, more compact passive components can be installed when it is possible to work with higher switching frequencies.
The efficiency of the inverter is affected by:
- the switching circuit topology,
- the choice of components.
In terms of components, the switching losses of the power transistors particularly affect the efficiency of the inverter. Attempts are made to make them more efficient by using transistors made of materials with large band gaps such as GaN or SiC. The problem is that the costs of gallium nitride (GaN) and silicon carbide (SiC) are much higher than silicon-based components.
This means that if the inverter needs to be cheap while also offering greater efficiency, there is a need to be innovative with the design of the circuit.
Optimizing efficiency based on the example of a half-bridge
Half-bridges are an illustrative example of how the efficiency of an inverter can be optimized by significantly reducing switching losses. Here, we observe the commutation of the current flow from the flyback diode of the blocking upper switching transistor to the lower switching transistor (Figure 1).
Switching losses are dictated by two mechanisms that occur alongside ohmic losses:
- The reverse recovery charge (Qrr) stored in the flyback diode, which causes a current peak in the currently activated switching transistor that is switching to a conducting state.
- The charging current peak, which flows upon reversal of the output capacity (COSS) of the blocking upper switching transistor.
Synchronous reverse blocking topology
Circuits with a synchronous reverse blocking (SRB) topology use a serially connected second switching transistor Q2 to block the reverse current through the flyback diode of the switching transistor Q1. The switching transistor Q2 is controlled synchronously with Q1.
The reverse current is fed through a parallel SiC Schottky diode with a high breakdown voltage and an extremely low reverse recovery charge. This reduces the effect of Qrr significantly.
The flyback diode of Q2 is polarized so that no high voltages can develop across this transistor. A type with low dielectric strength (60V) is adequate.
Advanced synchronous reverse blocking (A-SRB) topology
Advanced SRB (A-SRB) topology reduces the losses caused by reversing the output capacity of Q1 significantly by pre-charging Q1 with a low voltage.
The curve of output capacity COSS against drain source voltage VDS shows a very high voltage correlation. If, for instance, VDS is raised from 0V to around 40V, the capacity is reduced by a factor of 100. This causes the charge current causing the losses to primarily flow in the lower VDS range of Q1 during the switching process.
However, a low voltage across Q1 means a high voltage across the lower transistor of the half-bridge, which switches to a conducting state. The charge current peak in this transistor therefore produces a high heat loss.
If COSS of transistor Q1 is pre-charged, for example to a voltage of 40V, before the lower switching transistor of the half-bridge is switched on, most of the charge current does not flow through Q1, meaning that it can hardly cause any losses. The pre-charging is performed by an additional voltage source implemented using a charge pump in the gate driver IC.
Figure 2 shows the most important components of an A-SRB switching topology:
- The actual switching transistor Q1 is a high-voltage superjunction DTMOS IV type with a maximum blocking voltage of 650V (for example).
- The auxiliary transistor Q2, which is connected serially to Q1, is a low-voltage superjunction UMOS VIII type with a blocking voltage of 60V.
- An SiC Schottky diode with a very low reverse recovery charge is used as a flyback diode.
- It is controlled using the IC T1HZ1F driver. It uses a PWM (pulse-width modulation) input signal to generate all of the required control signals for the transistor gates and the charge pulse for pre-charging the output capacity of Q1.
Advantages of the A-SRB technology developed by Toshiba:
- Highly reduced switching losses
- Ability to use low-cost, proven, silicon-based components
- This allows for low-cost inverters with high efficiencies
A-SRB topologies are suitable for
- Photovoltaic inverters
- DC/DC converters
- Power factor correction
- Drive controllers
SPICE simulations performed on an inverter bridge (H4 topology) with and without A-SRB have shown that A-SRB technology also provides greater efficiency in an inverter in practical applications. Figure 4 illustrates the efficiency gains achieved for bipolar modulation with the aid of A-SRB for a variety of output power values and switching frequencies. Because A-SRB reduces switching losses, the efficiency gains are most apparent for high switching frequencies, reaching up to 4 per cent in this case.
This design uses a Toshiba DTMOS IV type with a low RDS(on) (100 A, 600 V) as a switching transistor.
The inverter bridge with A-SRB functionality can be implemented in different ways depending on the power rating. For module inverters with a maximum input power of around 300W, there is the T1JM4 module from Toshiba. It contains a complete integrated half-bridge, including gate driver with A-SRB functionality, switching transistors and SiC Schottky diodes.
Kits comprising discrete gate drivers with the switching elements are available for photovoltaic inverters with high input power values of up to around 5kW.
Find components at www.rutronik24.com.