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All NANDs are not the same


SLC, MLC, TLC, 3D - NAND Flash memory systems are available in a variety of technologies. Knowing what is available helps find the optimum memory for a specific application.

NAND Flash is a non-volatile memory which retains data even with no power supply. But the retention time has its limits; memory cells malfunction, are no longer able to receive data, or might even lose what they already hold.

Each Flash memory cell stores data on a floating gate coated by an insulating oxide layer. When data is written, deleted and read, electrons are moved into the floating gate by electrical voltage. This degrades the insulating effect of the oxide layer, however, causing the previously moved charge to flow away again - the memory cell is faulty. Consequently, the number of program-erase (P/E) cycles is limited.

How long data is retained in a cell (data retention) depends on the number of P/E cycles, but also on the ambient temperature and the Flash technology used.


One bit per cell

SLC (single-level cell) Flash technology is able to store one bit per cell. This means that there are two different voltage levels on the floating gate: charged or uncharged. They are easy to differentiate, and so there is little susceptibility to error. Consequently, this technology provides up to 100,000 P/E cycles before losing data.

A disadvantage, however, is the relatively high price per bit. To cut that cost, more data needs to be stored on a cell, meaning the number of bits has to be increased. To that end, the charge in a memory cell is metered more finely, and evaluated more exactly when being read.


Two bits per cell

With MLC (multi-level cell) technology, two bits per cell can be stored. That means there are four different voltage levels on the floating gate. As they are more difficult to differentiate, the probability of error is increased. So only 3,000 P/E cycles can be expected with this technology.

A derivative of MLC is eMLC. It moves fewer electrons through the various voltage levels. As a result, the P/E cycles are increased to as many as 30,000, though there is a simultaneous reduction in data retention.

MLC in SLC mode (pseudo-SLC, SuperMLC, SLC Lite, etc.) is an MLC technology which is addressed like an SLC technology: Only two bits per cell are used, so fewer voltage levels have to be differentiated, and the susceptibility to error is reduced. This permits about 20,000 P/E cycles.

The TLC (triple-level cell) Flash technology is able to store three bits per cell, meaning eight voltage levels are possible on the floating gate. Differentiating them clearly is very complex, and correspondingly susceptible to error. So the expected P/E cycles are reduced to between 600 and 900.

Shrinkage is a further step in Flash production aimed at cutting cost per bit. In this, the NAND structures are created in ever smaller dimensions, to enable more efficient production. As a result, the floating gate and its oxide layer also shrink - and so the insulation is reduced.

That is to say: All methods of reducing production cost entail a deterioration in quality of the Flash memory: The bit error rate increases, the number of P/E cycles reduces, and performance and data retention worsen. This means increasingly complex memory management is required to turn the lower-quality Flash cells into industrial memory.


Flash memory for industry

A Flash memory cell includes the memory component as well as a controller with firmware to handle the management. These management features perform tasks which are vital in the industrial environment:

  • Wear Leveling ensures consistent usage of all memory cells by writing to the ones that are least worn down.

  • Paged Based Mapping reduces the volume of data actually written to the Flash memory when storing. Since the architecture dictates that entire memory blocks are always addressed, the written data volume can be considerably higher than the volume that actually need to be stored.

  • Auto Refresh scans all the memory cells in an inactive moment, and checks the quality of the stored data against a limit value. If the limit value is exceeded, the data is copied to a different block. This means that rarely used data is also retained.

  • Read Disturb counts the number of read operations to a memory cell and, when a specific number is reached, copies the content to a different cell. Since every time a memory cell is read both the cell itself and surrounding cells are degraded, a limit of this kind protects against data loss.

  • Read Retry repeats a read operation if uncorrectable errors occur. The second try is carried out with different internal voltage levels. This rules out errors resulting from differing temperatures between the read and write operations.

  • Power Fail Protection protects data in the event of an unexpected voltage drop. This can be assured by way of the firmware or by capacitors.


Focus on industry

Another key factor in terms of industrial applications is a fixed BoM (Bill of Materials) in combination with PCN (Product Change Notification) handling. Prior to start of series production of a Flash memory, all the components are checked to ensure their adequacy for industrial use. A 100% fixed BoM guarantees that all the memory hardware and software components are identical to those subjected to advance testing. Because, depending on the application, any changes to a component or to the firmware might have serious effects. To counteract this, manufacturers specializing in the industrial market communicate any such changes in advance in a PCN. This means customers have enough time to conduct tests and find alternatives if necessary. Last Time Buy and End of Life are also specified in this.

Technological advances such as shrinkage come up against physical barriers. The initial 70nm structures of Flash cells have been reduced down to 15nm at present - a size that can barely be made any smaller. Instead of driving forward developments in that area, the two-dimensional layout of the Flash cells has been fundamentally changed, and extended into the third dimension. This 3D NAND technology stacks layers of memory cells vertically, so creating a far greater memory density than would be possible in two dimensions. Compared to 2D NAND, it thus results in smaller form factors, less power consumption, far greater capacities, and longer endurance.

Rutronik offers all currently available on the market form factors and capacities and will continue to do so in the future. - As a partner of Intel, Swissbit, Apacer, Toshiba and Transcend Rutronik is in close contact with all the leading manufacturers.

Flash memory and other components are available at